Prerequisites : B.E/B.Tech in ECE/EEE, M.E/M.Tech/M.S in VLSI/Embedded Systems/Digital Electronics.
Course Duration: 3-4months
Course Fee : contact admin for price details
Available PDK :
- TSMC180nm-Bcd, TSMC65nm, TSMC40nm,TSMC28nm, TSMC22nm-FDSOI, TSMC10nm, TSMC16nm Finfet,
- UMC40nm, UMC 28nm,
- SMIC 28nm, Samsung 7nm Finfet
Verification Tool used :
Calibre nmDRC - V2021
Course Outline:
- fabrication process Basics of Devices Inverter Layout & Verification Checks,
- Other gates Layout & verification Checks,
- Digital Layout & verification Checks
Candidates will know IC Design flow, and will be able to
do independently Analog & Mixed Signal layout.
Course Outline:
- fabrication process Basics of Devices Inverter Layout & Verification Checks
- Matching techniques for different devices Shielding signals & Coupling analysis.
- Basics of Latch up, ESD, Antenna
Final Project: Voltage regulator, Band gap, PLL, OPAMP, Etc..
Candidates will know IC Design flow, and will be able to
do independently I/O & ESD layout . Independently I/O & ESD layout.
Course Outline:
- fabrication process Basics of Devices Inverter Layout & Verification Checks Layout of Input/ Output drivers different architecture Transmitter & Receiver layout Basics of Latch up, ESD.
- Complete Design of an IO/ESD pad
Final Project: Different types of ESD Layouts
Hello, My Name is Sureshkanna Im Having a dedicated professional with 5+ years of experience. and also Good experience in layout design and verification using cadence in Analog - mixed signal &Custom Digital & RF High Frequency Layout.
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